A severe limitation of present day microcomputer systems is the speed at which arithmetic computations are carried out. The relatively slow speed of microcomputers using software to carry out arithmetic computations frequently limits the use of microcomputer systems to either slow speed utilizations or limits the accuracy of the calculations.
Several applications exists for high speed computer systems which must perform arithmetical computations as well as data manipulations. One such application relates to navigation and autopilot functions of high performance weapons systems Navigation and autopilot algorithms must be performed at iteration rates approaching 1 KHz. Frequently, these algorithms require significant numbers of both 16 bit and 32 bit multiplications.
Conventional, state of the art microprocessors, such as the Z8000 microprocessor and the MC6800 microprocessor, perfrom 16 bit multiplications in 9 to 20 microseconds and 32 bit multiplications in 75 to 125 microseconds. However, data transfer times to memory locations are typically on the order of 1 to 2 microseconds. Most high performance airborn computer applications cannot be adequately serviced by computers with these relatively slow multiplication execution times.
The arithmetic operations which take the most time, and thus are in need of speed enhancement are the multiplication of signed two's complement numbers, the summation of products, and the scaling by a desired power "n" to the base 2, and rounding of results. While commercial integrated circuits are available which implement multiplication and sum of products (such as are used in conventional calculators), none of the commercially available integrated circuits can perform all of these functions or are directly compatible with microcomputer systems.
Some specific examples of prior art systems include an arithmetic processor labelled AM9511 sold by Advanced Micro Devices, Inc. This commercially available arithmetic processor is an integrated circuit level system that is treated as a peripheral by the host CPU. The arithmetic processor is loaded with several arguments and then given a command to execute some function by the CPU. A significant amount of overhead software as well as relatively long execution times are required by these systems. However, these systems can be successfully interfaced to many different CPU types and require relatively little interface circuitry. A second category of prior art circuits, typically on the integrated circuit level, are termed parallel processors. These devices are usually designed to be compatible with only one type of host CPU because the processor is connected in parallel with the CPU. The parallel processor executes instructions (i.e., op codes) fetched from the program memory. These instructions must be selected as being illegal or unimplemented instruction codes to the host CPU. An example of such a parallel processor is the 8087 which is designed to be compatible with the 8086 microprocessor. Both of these integrated circuits are manufactured by the Intel Corporation. Both the arithmetic processor and the parallel processor usually execute a family of floating point instructions and some processors can even perform transendental functions. However, most of these processors do not support fixed point rounding and scaling in an efficient manner.
In addition to a need for a very fast single and double precision multiplier, with or without subsequent addition or subtraction steps, is the need for very fast circuitry that will round off and scale the calculated answer. The conventional way is to load the answer into the processor and then use the processor to shift the data and keep track of the scale factor. This procedure requires complicated software and a dedicated processor. Furthermore, this conventional way is relatively slow.
A further disadvantage of a conventional system using a microprocessor interfaced with a peripheral math processor is the seriatim transfer of the numbers or parameters followed by the command instructions. Obviously, this approach is twice as slow as one which would combine the two functions into a single step.
In summary, the disadvantages of the prior art devices include relatively slow speed, lack of compatibility with different types of microprocessors, and complex interfacing requirements. Many of the prior art systems also fail to provide high accuracy at a high speed.